A TTL (transistor-transistor logic) NPN-type transistor may be used as a current driver. For example, referring to FIG. 1, an NPN-type drive transistor Q0 of a drive circuit 8 has its base connected to an input terminal 10. The emitter of drive transistor Q0 is connected to a power supply ground rail and its collector is coupled to the power supply upper V.sub.cc rail via a pull-up resistor R2. The collector of transistor drive Q0 is connected to an output terminal 12. In response to a current I.sub.b at input terminal 10, a current I.sub.c is produced at output terminal 12.
When I.sub.b becomes too large, the drive transistor Q0 collector voltage can be driven down to low levels, close to the drive transistor Q0 emitter voltage. This causes a condition commonly known as "saturation" where charge is stored in both the base and collector regions of drive transistor Q0. Saturation causes poor performance if it is desired that drive transistor Q0 be employed in high-speed switching applications. For example, for such high-speed applications, when I.sub.b is switched off, it is desired that I.sub.c rapidly switch off in response. However, due to charge storage in the base and collector regions of drive transistor Q0, there is a time delay during which L stays on, even after I.sub.b has switched off.
To keep drive transistor Q0 out of saturation, a Schottky diode D5 may be connected between its base and collector, as shown with the dashed line in FIG. 1. Schottky diode D5 steers excess base-drive current to drive circuit output 12 so that the collector voltage cannot become low enough to cause saturation. Schottky diodes thus provide an effective method for avoiding drive transistor saturation. However, high quality Schottky diodes are not available in all integrated circuit fabrication processes. Therefore, alternative circuit configurations for avoiding drive transistor saturation are desired. One such alternative configuration is shown in FIG. 2. Where the components are the same as those of FIG. 1, they are given the same reference designations. In the drive circuit 18 of FIG. 2, a clamp transistor Q12 is provided with its collector connected to the circuit input 10. The base of clamp transistor Q12 is connected to the collector of clamp transistor Q12. The emitter of clamp transistor Q12 is coupled to output 12. Clamp transistor Q12 has a higher reverse saturation current density than that of drive transistor Q0, when drive transistor Q0 is saturated. Thus, in operation of the drive transistor circuit 18, clamp transistor Q12 steers a large portion of the current I.sub.b at input terminal 10 away from the base of drive transistor Q0. Also, because clamp transistor Q12 has a much lower charge storage time constant than drive transistor Q0, when drive transistor Q0 is saturated, the total amount of charge stored at the base of drive transistor Q0 is significantly reduced.
What is desired is a transistor drive circuit which, in operation, further reduces the total amount of charge stored at the base of the drive transistor.